IS DEEPSEEK
BUILDING_
CUSTOM_
CHIP_2026.
Lead: In June 2026, OpenAI and Broadcom taped out Jalapeño—a custom inference ASIC designed in nine months to cut ChatGPT serving costs. That global wave landed in China on July 7, when Reuters cited three sources reporting that DeepSeek is developing its own inference-only AI chip: the project reportedly started about a year ago, the company is talking to chip designers, foundries, and memory suppliers, and it has been quietly hiring engineers off public job boards. A counterintuitive detail: DeepSeek already runs deeply on Huawei Ascend, yet is still pursuing in-house silicon—meaning partnership and self-build run in parallel, not as either/or. Meanwhile, Alibaba's T-Head has mass-produced 560,000+ Zhenwu chips with billion-yuan annual revenue—a sharp contrast between rumor and an eight-year execution track. This article covers the full research brief: the DeepSeek evidence chain, Liang Wenfeng (DeepSeek CEO) public remarks, Alibaba's eight-year timeline, a July 2026 progress table, five economic drivers, inference vs training differences, risks, five FAQ answers, and a Mac developer angle.
30-Second Read · Executive Summary
| Is DeepSeek building chips? | Likely yes, early stage. Reuters Jul 7 report; no official confirmation; $7.4B funding includes custom silicon |
| Did Liang Wenfeng announce it? | No. He framed export bans and compute hunger—the strategic motive, not a product launch |
| Did Jack Ma just say this? | Different timeline. Ma named T-Head in 2018; Joe Tsai and Eddie Wu carried the narrative in 2024–2026 |
| Latest status? | DeepSeek early R&D; T-Head Zhenwu 810E in mass production; OpenAI Jalapeño taped out, deploy by late 2026 |
| Why build silicon? | Economics first: inference is AI's "rent"; custom ASICs can cut large-scale TCO by 30–65% |
1. Pain Points: Why Custom Chip News Exploded in July 2026
- News density: In June–July 2026, OpenAI Jalapeño, Reuters on DeepSeek, and The Information on Zhipu AI and Anthropic custom silicon broke almost simultaneously—this is not a China-only story but a global AI-lab land grab for compute.
- Framing traps: Readers often equate "Liang Wenfeng talked about compute constraints" with "official chip announcement," or read "Jack Ma set chip strategy in 2018" as "Ma just called for new silicon." This piece separates each layer.
- Training vs inference confusion: Most new projects are inference ASICs, not attempts to dethrone Nvidia in training—getting that right is how you judge the DeepSeek rumor's real weight.
2. The DeepSeek Custom Chip Rumor: Evidence Chain
2.1 What Was Reported (July 2026)
On July 7–8, 2026, outlets followed Reuters' exclusive. Core claims aligned across sources:
- DeepSeek is developing a custom AI chip optimized for inference, not training
- The project started around mid-2025 (reported as "about a year ago") and remains early stage
- DeepSeek is in talks with chip design houses, foundries, and memory suppliers
- It has ramped chip-engineer hiring in recent months—off public boards, via private recruiting
- If successful, the chip would reduce reliance on both Nvidia and Huawei Ascend—notable because DeepSeek already ships production workloads on Ascend
2.2 Credibility Assessment
| Dimension | Assessment |
|---|---|
| Source tier | High. Reuters' standard "three people familiar with the matter" phrasing, cross-validated by global financial media |
| Official confirmation | None. As of 2026-07-09, DeepSeek has issued no press release or social confirmation |
| Circumstantial evidence | Strong. June 2026 first external round ~$7.4B (~510B RMB) with disclosed use for "custom AI chips" and domestic compute expansion; IDC engineer hiring in Ulanqab and elsewhere; UE8M0 FP8 format read by industry as hardware-software co-design for domestic accelerators |
| Contradictions | Some mid-2026 analysis stressed short-term Ascend dependence. Cleaner framing: partnership is live; in-house silicon is early and parallel |
Editorial guidance: Write "According to Reuters and follow-on coverage, DeepSeek has launched an inference chip program." Do not write "Liang Wenfeng officially announced chip production." Tag stories with "sources say / early stage / unconfirmed."
2.3 Timeline
3. What Has Liang Wenfeng Said? How It Relates to the Rumor
Liang Wenfeng (DeepSeek CEO) rarely gives on-record interviews. The most valuable chip/compute quotes come from two Dark Waves (An Yong) deep dives in May 2023 and July 2024:
| Topic | Key quote | Source |
|---|---|---|
| Ban, not money, is the bottleneck | "Our real challenge has never been funding—it is the export ban on advanced chips." | Dark Waves, Jul 2024 |
| Efficiency gap = 4× compute need | Domestic vs overseas training efficiency differs by roughly one order of magnitude; data efficiency adds another—~4× compute needed for equivalent results | Dark Waves |
| Tech community gap | "Many domestic chips fail because they lack a supporting developer community… China needs someone at the technology frontier." | Dark Waves |
| Compute appetite | "For researchers, hunger for compute is endless… we consciously deploy as much compute as we can." | Dark Waves |
Link to the rumor: Liang Wenfeng has never publicly announced "DeepSeek will build chips." His remarks establish strategic motive: compute constraints, export controls, and the need for hardware-software co-design. Reuters documents corporate behavior—hiring, supplier talks—not a founder product reveal. Long-running founder statements ≠ official project disclosure.
4. Alibaba / Jack Ma: Eight Years of Execution, Not a Fresh Rumor
Readers asking "did Jack Ma say the same thing?" need a timeline reset: Alibaba chip strategy is a mature, shipping business—not breaking news.
4.1 Jack Ma Era (2018): Strategic Origin
- At the September 2018 Apsara Conference, Alibaba merged C-SKY Microsystems with Damo Academy's chip team into T-Head Semiconductor Co., Ltd.
- The brand name was personally approved by Jack Ma. "Pingtouge" (honey badger) signals fearlessness and long-horizon commitment
- Zhang Jianfeng (Xing Dian) called chips a group-level strategic priority, not a side project
- Early scope: AI accelerators (Hanguang series), embedded chips, cloud-edge integration—later expanded to server CPUs (Yitian) and RISC-V IP (Xuantie)
4.2 Jack Ma vs Joe Tsai vs Eddie Wu
| Figure | Role | Public chip-related statements |
|---|---|---|
| Jack Ma | 2018 strategic decision-maker | Named T-Head, elevated chips to group strategy; reduced public appearances after stepping down as chairman in 2019 |
| Joe Tsai | Current chairman | 2024 podcast: U.S. export limits "clearly affect" Alibaba Cloud; China AI ~two years behind U.S.; long-term belief China will build advanced semiconductors |
| Eddie Wu | Current CEO | FY2026 earnings call: T-Head AI chips delivered 470,000+ units, billion-yuan annualized revenue; open to future T-Head IPO |
Do not write "Jack Ma recently called for new chips." Accurate version: Ma set T-Head strategy in 2018; Tsai explained export-control pressure in 2024; Wu disclosed mass-production metrics in 2026.
4.3 T-Head Progress as of 2026
Product line: Zhenwu series
| Model | Timing | Highlights |
|---|---|---|
| Hanguang 800 | 2019 | Early AI inference accelerator |
| Zhenwu 810E | Jan 2026 launch | Train+inference; 96GB HBM2e; performance between Nvidia A800 and H20; in mass production |
| Zhenwu M890 | 2026 | 144GB memory, 800GB/s die-to-die link, ~3× 810E performance |
| Zhenwu V900 | Planned Q3 2027 | 216GB memory, 1200GB/s interconnect |
| Zhenwu J900 | Planned Q3 2028 | Next-gen parallel compute architecture |
Commercial metrics (2026): cumulative shipments 560,000+; annualized revenue ~10B RMB; customers include Alibaba Cloud, China Unicom, and reportedly 400+ enterprises on Zhenwu clusters; T-Head registered capital raised to 1B RMB (June 2026); Alibaba pledged 380B RMB over three years to cloud and AI infrastructure.
Nvidia relationship: WSJ reported Alibaba's new chips support the CUDA ecosystem, lowering engineer migration friction (a different path from Huawei). Manufacturing has shifted from early TSMC flows toward domestic foundry (industry consensus points to SMIC 7nm-class nodes) as U.S. rules restrict TSMC advanced AI wafer service for mainland China.
5. July 2026 Progress Comparison Table
| Company | Chip program | Stage | Workload | Key numbers / events |
|---|---|---|---|---|
| DeepSeek | Unnamed inference ASIC | Early R&D | Inference | $7.4B funding; quiet hiring; unconfirmed officially |
| Alibaba (T-Head) | Zhenwu 810E / M890 | Mass production | Train + inference | 560K+ shipped; ~10B RMB annualized revenue |
| Huawei | Ascend 950 series | Mass production | Train + inference | DeepSeek V4 adaptation; Reuters-reported order surge |
| OpenAI | Jalapeño (with Broadcom) | Tape-out done, pending deploy | Inference | 9-month design-to-tape-out; target deploy late 2026 |
| TPU v6/v7 | Large-scale commercial | Train + inference | Gemini end-to-end on TPU | |
| Amazon | Trainium3 / Inferentia | Commercial | Training + inference | Anthropic heavy Trainium usage |
| Microsoft | Maia 100 | Deploying | Inference | Powers Azure / OpenAI serving loads |
| Meta | MTIA | Internal deploy | Inference | Recommendation systems; one redesign restart |
| Anthropic | Samsung custom chip talks | Exploratory | TBD | The Information, July 2026 |
| Zhipu AI | Evaluating custom silicon | Early | Inference | The Information, July 2026 |
TrendForce (2026): hyperscaler custom AI chip shipment growth 44.6% vs general GPU growth 16.1%—custom silicon is outpacing GPU growth for the first time on velocity.
6. Global Benchmark: Not Just Chinese Labs
By July 2026, "AI companies building chips" is a global infrastructure race, not a nationalism headline. The through-line is unit economics—who serves inference cheapest at billion-user scale.
7. Why Every Hyperscaler Wants Custom Silicon: Five Drivers
One-line answer: AI competition moved from "best model weights" to "cheapest, most controllable compute per token."
| Rank | Driver | Core logic | Key data |
|---|---|---|---|
| 1 | Economics: inference is AI's "rent" | Training = down payment; inference = monthly rent. At ChatGPT-scale DAU, inference spend exceeds training | Morgan Stanley: 24,000 Blackwell GPUs ~$852M hardware vs comparable Google TPU footprint ~$99M. Custom ASIC TCO advantage 40–65% at scale; per-token cost down 30–40% |
| 2 | Supply chain security & geopolitics | U.S. export controls on China; Beijing pushes domestic compute; U.S. labs face Nvidia allocation caps | Security here means predictable supply—not single-vendor or single-policy chokepoints |
| 3 | Hardware-software co-design | DeepSeek UE8M0 FP8 + MLA; OpenAI Jalapeño tuned for ChatGPT KV cache/batching/latency | GPUs trade efficiency for flexibility; ASICs trade flexibility for known-workload efficiency |
| 4 | Competitive moat & bargaining power | Even partial in-house silicon strengthens Nvidia purchase negotiations | Full-stack narrative: model + cloud + chip (Alibaba "golden triangle," OpenAI infrastructure stack) |
| 5 | Energy & sustainability | Inference ASICs optimize performance-per-watt | At megawatt/gigawatt data-center scale, power and cooling rival chip capex; ASICs shed unused GPU logic |
Nvidia data-center GPU gross margins exceed 70%—every H200 purchase ships most profit to Nvidia. Custom silicon converts recurring "GPU tax" into upfront R&D.
7.1 Security vs Cost Savings: How to Frame Both
| Angle | Audience | How to write it |
|---|---|---|
| Geopolitics / decoupling | Policy watchers | Export controls, domestic substitution, supply autonomy |
| Business / investing | AI economics readers | TCO, gross margin, token cost, capex ROI |
| Engineering | Builders | Co-design, ASIC vs GPU, inference serving architecture |
| Enterprise security | Procurement | Data sovereignty, supply resilience, third-party dependency reduction |
English readers respond strongly to unit economics, Nvidia tax, and TCO; Chinese readers often lead with supply-chain autonomy. A complete article threads both—with economics up front for this EN edition.
8. Inference Chips vs Training GPUs: Why the Market Is Splitting
| Dimension | Training | Inference |
|---|---|---|
| Workload | Dynamic, experimental, architectures shift often | Static models, predictable request patterns |
| Software stack | CUDA moat (cuDNN, NCCL, Nsight) | Hand-tuned kernels for fixed models |
| Chip needs | Peak FLOPS + programmability | Throughput, latency, cost per token |
| Economic scale | Large one-time cluster spend | 24/7 continuous, often larger aggregate spend |
| Leaders | Nvidia H100/B200 dominance | TPU (partial), Trainium, Maia, Jalapeño, rumored DeepSeek ASIC |
Bottom line: training stays Nvidia territory; inference is the custom ASIC battleground. That is the technical and economic logic behind DeepSeek's reported inference-only focus.
9. Risks and Uncertainty
- Early programs fail: Meta MTIA restarted once—announcing silicon ≠ shipping silicon.
- Architecture drift: ASICs optimized for today's models can age fast if architectures pivot.
- DeepSeek unconfirmed: Until a press release lands, use "reportedly / sources say"—not "confirmed."
- Manufacturing bottlenecks: Advanced nodes, HBM supply, and foundry capacity constrain everyone—not only Chinese firms.
10. Five Steps for Developers and Decision-Makers
- Tier your news sources: Reuters exclusive → indirect signals (funding use, hiring) → founder interview motive → official announcement. Climb that ladder before updating strategy.
- Track inference cost, not just training FLOPS: If you run an AI product, benchmark cost per million tokens and p99 latency—not peak tensor throughput alone.
- Watch co-design signals: DeepSeek UE8M0 FP8, MLA, and similar model-layer choices often precede hardware targets—read technical blogs and paper footnotes.
- Plan multi-vendor fallback: Whether or not DeepSeek silicon ships, enterprises should assume Nvidia + domestic ASIC + cloud API paths to avoid single-supplier lock-in.
- Set a refresh cadence: This topic can move in 2–4 weeks. Last updated: 2026-07-09. Follow Reuters, OpenAI's engineering blog, and Alibaba earnings transcripts.
11. FAQ
Q1: Is DeepSeek really building its own AI chip?
Reuters reported on July 7, 2026, citing three sources, that DeepSeek is developing an early-stage inference chip. DeepSeek has not officially confirmed it.
Q2: Did DeepSeek CEO Liang Wenfeng announce a chip program?
No public announcement. In 2024 interviews he said export controls on advanced chips were DeepSeek's main challenge, not funding.
Q3: How is Alibaba involved?
Alibaba's chip unit T-Head (founded in 2018 under Jack Ma's strategy) is already mass-producing Zhenwu AI chips, with 560,000+ units shipped and billion-yuan annual revenue as of 2026.
Q4: Why inference chips first, not training chips?
Inference workloads are repetitive and predictable—ideal for custom ASICs. Training still relies heavily on Nvidia GPUs and the CUDA software stack.
Q5: Is it about national security or saving money?
Both. Economics is the primary driver—cutting the Nvidia tax and per-token costs at scale—while export controls and supply chain risk accelerate the shift.
12. Disclaimer and Sources
DeepSeek has not officially confirmed a chip program as of this writing. This article synthesizes Reuters, OpenAI official announcements, WSJ, Caixin Global, Dark Waves interviews, and Alibaba public disclosures for technical and industry analysis only—not investment advice.
- Reuters: DeepSeek developing own AI chip (Jul 7, 2026)
- OpenAI Official: Jalapeño inference chip announcement
- WSJ: Alibaba AI chip to fill Nvidia void
- Caixin Global: Alibaba Zhenwu 810E analysis
- SCMP: Joe Tsai on chip export restrictions
- Dark Waves: Liang Wenfeng 2023/2024 interviews
13. Close: Hyperscalers Build "Rent Chips"; Developers Validate on Mac Today
While DeepSeek, OpenAI, and Alibaba's T-Head fight over inference ASIC economics, most builders face a more immediate question: how fast does my model run locally, and will API bills scale linearly with DAU? Cloud GPUs on Windows/Linux handle production inference—but prototyping on Apple Silicon via MLX / Ollama, using unified memory for mid-size models, then bursting peaks to remote nodes, is often the fastest iteration loop. If you need an isolated environment to test DeepSeek-derived models, compare quantization schemes for token cost, or keep dev API keys off your daily driver, consider a MACGPU remote Mac mini M4 node: Apple Silicon unified memory suits local inference experiments, SSH on-demand start/stop, and separates "wait for hyperscaler silicon" from "validate my workflow this week."